Thomas Lundqvist - Publications
Theses
| [thesis02] | Thomas Lundqvist: "A WCET Analysis Method for Pipelined Microprocessors with Cache Memories," PhD thesis, Dept. of Computer Engineering, Chalmers University of Technology, Sweden, June 2002. |
| [lic99] | Thomas Lundqvist: "A Static Timing Analysis Method for Programs on High-Performance Processors," Licentiate thesis TR-315L, June 1999. (This thesis is a collection of three papers: [rts99], [tr99-4], and [tr99-5]). |
| [thesis95] | Harry Gunnarsson and Thomas Lundqvist: "Porting the GNU C Compiler to the Thor Microprocessor," Master of science thesis, Göteborg, Sweden, 1995. (The work was done at Saab Ericsson Space AB). |
In journals
| [rts99] | Thomas Lundqvist and Per Stenström: "An Integrated Path and Timing Analysis Method based on Cycle-Level Symbolic Execution," in Real-Time Systems, 17 (2/3):183-207, November 1999. |
In conference and workshop proceedings
| [ecrts-wip08] | Thomas Lundqvist and Patrik Sandin: "Towards a practical WCET analysis approach based on testing," in the Work in Progress Session of 20th Euromicro conference on real-time systems (ECRTS'08 WIP), June 2008. |
| [rtcsa99] | Thomas Lundqvist and Per Stenström: "A Method to Improve the Estimated Worst-Case Performance of Data Caching," in Proceedings of the 6th International Conference on Real-Time Computing Systems and Applications (RTCSA'99), pages 255-262, December 1999. |
| [rtss99] | Thomas Lundqvist and Per Stenström: "Timing Anomalies in Dynamically Scheduled Microprocessors," in Proceedings of the 20th IEEE Real-Time Systems Symposium (RTSS'99), pages 12-21, December 1999. |
| [lctes98] | Thomas Lundqvist and Per Stenström: "Integrating Path and Timing Analysis using Instruction-Level Simulation Techniques," in Proceedings of ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems, pages 1-15, June 1998. |
Technical reports
| [tr02-11] | Thomas Lundqvist: "Data Cache Timing Analysis with Unknown Data Placement," Technical Report No. 02-11, Dept. of Computer Engineering, Chalmers, February 2002. |
| [tr99-5] | Thomas Lundqvist and Per Stenström: "Timing Anomalies in Dynamically Scheduled Microprocessors," Technical Report No. 99-5. |
| [tr99-4] | Thomas Lundqvist and Per Stenström: "Empirical Bounds on Data Caching in High-Performance Real-Time Systems," Technical Report No. 99-4. |
| [tr98-3] | Thomas Lundqvist and Per Stenström: "Integrating Path and Timing Analysis using Instruction-Level Simulation Techniques," Technical Report No. 98-3. |